2009 - 2015 Microchip Technology Inc.
DS00001880A-page 1
Highlights
• USB-IF Battery Charging 1.2 Specification Com-
pliant
• Link Power Management (LPM) Compliant
• Integrated ESD protection circuits
• Up to ±25kV IEC Air Discharge without external
devices
• Over-Voltage Protection circuit (OVP) protects the
VBUS pin from continuous DC voltages up to 30V
• Integrated USB Switch (USB3331, USB3336, and
USB3338)
- No degradation of Hi-Speed electrical char-
acteristics
- Allows single USB port of connection by pro-
viding switching function for:
- Battery charging
- Stereo and mono/mic audio
- USB Full-Speed/Low-Speed data
• RapidCharge Anywhere™ Provides:
- 3-times the charging current through a USB
port over traditional solutions
- USB-IF Battery Charging 1.2 compliance to
any portable device
- Charging current up to 1.5Amps via compati-
ble USB host or dedicated charger
- Dedicated Charging Port (DCP), Charging
(CDP) & Standard (SDP) Downstream Port
support
• flexPWR
®
Technology
- Extremely low current design ideal for battery
powered applications
- “Sleep” mode tri-states all ULPI pins and
places the part in a low current state
- 1.8V to 3.3V IO Voltage (USB3333)
• Single Power Supply Operation
- Integrated 1.8V regulator
- Integrated battery to 3.3V regulator
- 100mV dropout voltage
• PHYBoost
- Programmable USB transceiver drive
strength for recovering signal integrity
• VariSense
TM
- Programmable USB receiver sensitivity
• “Wrapper-less” design for optimal timing perfor-
mance and design ease
- Low Latency Hi-Speed Receiver (43 Hi-
Speed clocks Max) allows use of legacy
UTMI Links with a ULPI bridge
• External Reference Clock operation available
- ULPI Clock In Mode (60MHz sourced by
Link)
- 0 to 3.6V input drive tolerant
- Able to accept “noisy” clock sources as refer-
ence to internal, low-jitter PLL
- USB3330 and USB3333 support multiple fre-
quencies
• Smart detection circuits allow identification of
USB charger, headset, or data cable insertion
• Includes full support for the optional On-The-Go
(OTG) protocol detailed in the On-The-Go Sup-
plement Revision 2.0 specification
• Supports the OTG Host Negotiation Protocol
(HNP) and Session Request Protocol (SRP)
• UART mode for non-USB serial data transfers
• Internal 5V cable short-circuit protection of ID, DP
and DM lines to VBUS or ground
• Industrial Operating Temperature -40
°C to +85°C
• 25 ball, WLCSP RoHS Compliant package
(1.97 x 1.97 x 0.53 mm height)
Applications
The USB333x is the solution of choice for any applica-
tion where a Hi-Speed USB connection is desired and
when board space, power, and interface pins must be
minimized.
• Cell Phones
• PDAs
• MP3 Players
• GPS Personal Navigation
• Scanners
• External Hard Drives
• Digital Still and Video Cameras
• Portable Media Players
• Entertainment Devices
• Printers
• Set Top Boxes
• Video Record/Playback Systems
• IP and Video Phones
• Gaming Consoles
USB333x
Industry’s Smallest Hi-Speed USB Transceiver
with Single Supply Operation
USB333x
DS00001880A-page 2
2009 - 2015 Microchip Technology Inc.
TO OUR VALUED CUSTOMERS
It is our intention to provide our valued customers with the best documentation possible to ensure successful use of your Microchip
products. To this end, we will continue to improve our publications to better suit your needs. Our publications will be refined and
enhanced as new volumes and updates are introduced.
If you have any questions or comments regarding this publication, please contact the Marketing Communications Department via
E-mail at
docerrors@microchip.com
. We welcome your feedback.
Most Current Data Sheet
To obtain the most up-to-date version of this data sheet, please register at our Worldwide Web site at:
http://www.microchip.com
You can determine the version of a data sheet by examining its literature number found on the bottom outside corner of any page.
The last character of the literature number is the version number, (e.g., DS30000000A is version A of document DS30000000).
Errata
An errata sheet, describing minor operational differences from the data sheet and recommended workarounds, may exist for cur-
rent devices. As device/documentation issues become known to us, we will publish an errata sheet. The errata will specify the
revision of silicon and revision of document to which it applies.
To determine if an errata sheet exists for a particular device, please check with one of the following:
• Microchip’s Worldwide Web site;
http://www.microchip.com
• Your local Microchip sales office (see last page)
When contacting a sales office, please specify which device, revision of silicon and data sheet (include -literature number) you are
using.
Customer Notification System
Register on our web site at
www.microchip.com
to receive the most current information on all of our products.
2009 - 2015 Microchip Technology Inc.
DS00001880A-page 3
USB333x
Table of Contents
1.0 Introduction ..................................................................................................................................................................................... 4
2.0 USB333x Pin Locations and Definitions ........................................................................................................................................ 8
3.0 Limiting Values .............................................................................................................................................................................. 14
4.0 Electrical Characteristics ............................................................................................................................................................... 15
5.0 Architecture Overview ................................................................................................................................................................... 22
6.0 ULPI Operation ............................................................................................................................................................................. 40
7.0 ULPI Register Map ........................................................................................................................................................................ 58
8.0 Application Notes .......................................................................................................................................................................... 70
9.0 Package Outlines, Tape & Reel Drawings, Package Marking ...................................................................................................... 75
Appendix A: Data Sheet Revision History ........................................................................................................................................... 80
Product Identification System ............................................................................................................................................................. 82
The Microchip Web Site ...................................................................................................................................................................... 83
Customer Change Notification Service ............................................................................................................................................... 83
Customer Support ............................................................................................................................................................................... 83
USB333x
DS00001880A-page 4
2009 - 2015 Microchip Technology Inc.
1.0
INTRODUCTION
1.1
General Description
Microchip’s USB333x is a family of High Speed USB 2.0 Transceivers that provides a physical layer (PHY) solution well-
suited for portable electronic devices. Both commercial and industrial temperature applications are supported.
Each model in the USB333x family may use a 60MHz reference clock or the model-number specific reference clock as
shown on the
Product Identification System
page. The USB3330 and USB3333 can support several different frequen-
cies driven on the REFCLK pin. The configuration of the frequency selection pins set the desired reference frequency.
Several advanced features make the USB333x the transceiver of choice by reducing both eBOM part count and printed
circuit board (PCB) area. Outstanding ESD robustness eliminates the need for external ESD protection devices in typ-
ical applications. The internal Over-Voltage Protection circuit (OVP) protects the USB333x from voltages up to 30V on
the VBUS pin. By using a reference clock from the Link, the USB333x removes the cost of a dedicated crystal reference
from the design. The USB333x includes integrated 3.3V and 1.8V regulators, making it possible to operate the device
from a single power supply.
The USB333x is optimized for use in portable applications where a low operating current and standby current is essen-
tial. The USB333x also supports the Link Power Management protocol (LPM) to further reduce USB operating currents.
The USB333x also includes integrated battery charger detection circuitry. These circuits are used to detect the attach-
ment of a USB Charger as described in
Section 5.8
. By sensing the attachment to a USB Charger, a product using the
USB333x can draw more than 500mA from the USB connector.
The USB333x meets all of the electrical requirements for a High Speed USB Host, Device, or an On-the-Go (OTG) trans-
ceiver. In addition to the supporting USB signaling, the USB333x also provides USB UART mode and, in versions with
the integrated USB switch, USB Audio mode.
USB333x uses the industry standard UTMI+ Low Pin Interface (ULPI) to connect the USB PHY to the Link. ULPI uses
a method of in-band signaling and status byte transfers between the Link and PHY to facilitate a USB session with only
twelve pins.
The USB333x uses Microchip’s “wrapper-less” technology to implement the ULPI interface. This “wrapper-less” tech-
nology allows the PHY to achieve a low latency transmit and receive time. Microchip’s low latency transceiver allows an
existing UTMI Link to be reused by adding a UTMI to ULPI bridge. By adding a bridge to the ASIC the existing and
proven UTMI Link IP can be reused.
Versions of the USB333x with the integrated USB switch enable a single USB port of connection.
2009 - 2015 Microchip Technology Inc.
DS00001880A-page 5
USB333x
1.2
Block Diagrams
In USB Audio mode, a switch connects the DP pin to the SPK_R pin, and another switch connects he DM pin to the
SPK_L
pin. These switches are shown in the lower left-hand corner of
Figure 5-1
.The USB333x can be configured to
enter USB Audio mode as described in
Section 6.7.2
. In addition, these switches are on when the RESETB pin of the
USB333x is asserted. The USB Audio mode enables audio signaling from a single USB port of connection, and the
switches may also be used to connect Full Speed USB from another transceiver to the USB connector.
FIGURE 1-1:
BLOCK DIAGRAM (USB3331, USB3336, AND USB3338)
OTG
USB
DP/DM
Switch
Hi-Speed
USB
Transceiver
ULPI
Interface
ULPI
Registers
and State
Machine
BIAS
Low Jitter
Integrated
PLL
Integrated
Power
Management
VBUS
ID
DP
DM
RBIAS
ESD Pr
ot
ecti
on
SP
K_L
S
PK_
R
REFCLK
DATA[7:0]
RESETB
VDD18
VDD33
VBAT
DIR
NXT
STP
CLKOUT
OVP
USB333x
DS00001880A-page 6
2009 - 2015 Microchip Technology Inc.
FIGURE 1-2:
BLOCK DIAGRAM (USB3330)
FIGURE 1-3:
BLOCK DIAGRAM (USB3333)
OTG
Hi-Speed
USB
Transceiver
ULPI
Interface
ULPI
Registers
and State
Machine
BIAS
Low Jitter
Integrated
PLL
Integrated
Power
Management
VBUS
ID
DP
DM
RBIAS
ES
D
Pro
tect
ion
REF
C
L
K
DATA[7:0]
RESETB
VDD18
VDD33
VBAT
DIR
NXT
STP
CLKOUT
OVP
REF
[1
:0]
OTG
Hi-Speed
USB
Transceiver
ULPI
Interface
ULPI
Registers
and State
Machine
BIAS
Low Jitter
Integrated
PLL
Integrated
Power
Management
VBUS
ID
DP
DM
RBIAS
ESD Protection
REF
C
L
K
DATA[7:0]
RESETB
VDD18
VDD33
VBAT
DIR
NXT
STP
CLKOUT
OVP
REF
[0
]
VDDIO
2009 - 2015 Microchip Technology Inc.
DS00001880A-page 7
USB333x
The USB333x includes an integrated 3.3V LDO regulator that is used to generate 3.3V from power applied to the VBAT
pin. The voltage on the VBAT pin can range from 3.0 to 5.5V. The regulator dropout voltage is less than 100mV which
allows the PHY to continue USB signaling when the voltage on VBAT drops to 3.0V. The USB transceiver will continue
to operate at lower voltages, although some parameters may be outside the limits of the USB-IF specification for Full
Speed USB operation. The VBAT and VDD33 pins should never be connected together.
In USB UART mode, the USB333x DP and DM pins are redefined to enable pass-through of asynchronous serial data.
The USB333x will enter UART mode when programmed, as described in
Section 6.7.1
.
1.3
Reference Documents
UTMI+ Low Pin Interface (ULPI) Specification, Revision 1.1
Universal Serial Bus Specification, Revision 2.0
On-The-Go Supplement to the USB2.0 Specification, Revision 1.3
On-The-Go Supplement to the USB2.0 Specification, Revision 2.0
USB Battery Charging Specification, Revision 1.2
USB333x
DS00001880A-page 8
2009 - 2015 Microchip Technology Inc.
2.0
USB333X
PIN LOCATIONS AND DEFINITIONS
2.1
Package Diagram with Ball Locations
The illustration below is viewed from the top of the package.
FIGURE 2-1:
USB3331, USB3336, AND USB3338 BALL LOCATIONS - TOP VIEW
FIGURE 2-2:
USB3330 BALL LOCATIONS - TOP VIEW
A
E
D
C
B
1
5
4
3
2
TOP VIEW
RESETB
ID
VBUS
VBAT
VDD33
DM
DP
SPK_R
SPK_L
DATA[7]
DATA[4]
DATA[6]
DATA[5]
CLKOUT
DATA[3]
DATA[2]
DATA[1]
DATA[0]
NXT
DIR
STP
VDD18
REFCLK
RBIAS
GND
A
E
D
C
B
1
5
4
3
2
TOP VIEW
RESETB
ID
VBUS
VBAT
VDD33
DM
DP
REF[0]
REF[1]
DATA[7]
DATA[4]
DATA[6]
DATA[5]
CLKOUT
DATA[3]
DATA[2]
DATA[1]
DATA[0]
NXT
DIR
STP
VDD18
REFCLK
RBIAS
GND
2009 - 2015 Microchip Technology Inc.
DS00001880A-page 9
USB333x
2.2
Ball Definitions
The following table details the ball definitions for the figure above.
FIGURE 2-3:
USB3333 BALL LOCATIONS - TOP VIEW
TABLE 2-1:
USB3331, USB3336, AND USB3338 PIN DESCRIPTION
Ball
Name
Direction/
Type
Active
Level
Description
B1
ID
Input,
Analog
N/A
For device applications the ID pin is connected to
VDD33
. For Host applications ID is grounded. For
OTG applications the ID pin is connected to the USB
connector.
C2
VBUS
I/O,
Analog
N/A
This pin is used for the VBUS comparator inputs and
for VBUS pulsing during session request protocol. An
external resistor, R
VBUS
, is required between this pin
and the USB connector.
C1
VBAT
Power
N/A
Regulator input. The regulator supply can be from
5.5V to 3.0V.
D2
VDD33
Power
N/A
3.3V Regulator Output. A 1.0uF (<1 ohm ESR) bypass
capacitor to ground is required for regulator stability.
The bypass capacitor should be placed as close as
possible to the USB333x.
D1
DM
I/O,
Analog
N/A
D- pin of the USB cable.
E1
DP
I/O,
Analog
N/A
D+ pin of the USB cable.
E2
SPK_R
I/O,
Analog
N/A
USB switch in/out for DP signals.
E3
SPK_L
I/O,
Analog
N/A
USB switch in/out for DM signals.
A
E
D
C
B
1
5
4
3
2
TOP VIEW
VDD18
ID
RESETB
VBAT
VBUS
DM
DP
REF[0]
DATA[7]
VDD33
DATA[4]
DATA[6]
DATA[5]
CLKOUT
DATA[3]
DATA[2]
DATA[1]
DATA[0]
NXT
DIR
STP
VDDIO
REFCLK
RBIAS
GND
USB333x
DS00001880A-page 10
2009 - 2015 Microchip Technology Inc.
D3
DATA[7]
I/O,
CMOS
N/A
ULPI bi-directional data bus. DATA[7] is the MSB.
E4
DATA[6]
I/O,
CMOS
N/A
ULPI bi-directional data bus.
E5
DATA[5]
I/O,
CMOS
N/A
ULPI bi-directional data bus.
D4
DATA[4]
I/O,
CMOS
N/A
ULPI bi-directional data bus.
A5
CLKOUT
Output,
CMOS
N/A
ULPI Clock Out Mode:
60MHz ULPI clock output. All ULPI signals are driven
synchronous to the rising edge of this clock.
ULPI Clock In Mode:
Connect this pin to VDD18 to configure 60MHz ULPI
Clock IN mode as described in
Section 5.4.1
.
D5
DATA[3]
I/O,
CMOS
N/A
ULPI bi-directional data bus.
C4
DATA[2]
I/O,
CMOS
N/A
ULPI bi-directional data bus.
C5
DATA[1]
I/O,
CMOS
N/A
ULPI bi-directional data bus.
B4
DATA[0]
I/O,
CMOS
N/A
ULPI bi-directional data bus. DATA[0] is the LSB.
B5
NXT
Output,
CMOS
High
The PHY asserts NXT to throttle the data. When the
Link is sending data to the PHY, NXT indicates when
the current byte has been accepted by the PHY.
A4
DIR
Output,
CMOS
N/A
Controls the direction of the data bus. When the PHY
has data to transfer to the Link, it drives DIR high to
take ownership of the bus. When the PHY has no data
to transfer it drives DIR low and monitors the bus for
commands from the Link.
A3
STP
Input,
CMOS
High
The Link asserts STP for one clock cycle to stop the
data stream currently on the bus. If the Link is sending
data to the PHY, STP indicates the last byte of data
was on the bus in the previous cycle.
B3
VDD18
Power
N/A
1.8V Regulator Output. A 1.0uF (<1 ohm ESR) bypass
capacitor to ground is required for regulator stability.
The bypass capacitor should be placed as close as
possible to the USB333x.
B2
RESETB
Input,
CMOS,
Low
When low, the part is suspended and the 3.3V and
1.8V regulators are disabled. When high, the
USB333x will operate as a normal ULPI device, as
described in
Section 5.5.1
. The state of this pin may
be changed asynchronously to the clock signals.
When asserted for a minimum of 1 microsecond and
then de-asserted, the ULPI registers are reset to their
default state and all internal state machines are reset.
A2
REFCLK
Input,
CMOS
N/A
ULPI Clock Out Mode:
Model-specific reference clock.
See order numbers on
Product Identification System
page.
ULPI Clock In Mode:
60MHz ULPI clock input.
A1
RBIAS
Analog,
CMOS
N/A
Bias Resistor pin. This pin requires an 8.06kΩ (±1%)
resistor to ground, placed as close as possible to the
USB333x. Nominal voltage during ULPI operation is
0.8V.
C3
GND
Ground
N/A
Ground.
TABLE 2-1:
USB3331, USB3336, AND USB3338 PIN DESCRIPTION (CONTINUED)
Ball
Name
Direction/
Type
Active
Level
Description
2009 - 2015 Microchip Technology Inc.
DS00001880A-page 1
Highlights
• USB-IF Battery Charging 1.2 Specification Com-
pliant
• Link Power Management (LPM) Compliant
• Integrated ESD protection circuits
• Up to ±25kV IEC Air Discharge without external
devices
• Over-Voltage Protection circuit (OVP) protects the
VBUS pin from continuous DC voltages up to 30V
• Integrated USB Switch (USB3331, USB3336, and
USB3338)
- No degradation of Hi-Speed electrical char-
acteristics
- Allows single USB port of connection by pro-
viding switching function for:
- Battery charging
- Stereo and mono/mic audio
- USB Full-Speed/Low-Speed data
• RapidCharge Anywhere™ Provides:
- 3-times the charging current through a USB
port over traditional solutions
- USB-IF Battery Charging 1.2 compliance to
any portable device
- Charging current up to 1.5Amps via compati-
ble USB host or dedicated charger
- Dedicated Charging Port (DCP), Charging
(CDP) & Standard (SDP) Downstream Port
support
• flexPWR
®
Technology
- Extremely low current design ideal for battery
powered applications
- “Sleep” mode tri-states all ULPI pins and
places the part in a low current state
- 1.8V to 3.3V IO Voltage (USB3333)
• Single Power Supply Operation
- Integrated 1.8V regulator
- Integrated battery to 3.3V regulator
- 100mV dropout voltage
• PHYBoost
- Programmable USB transceiver drive
strength for recovering signal integrity
• VariSense
TM
- Programmable USB receiver sensitivity
• “Wrapper-less” design for optimal timing perfor-
mance and design ease
- Low Latency Hi-Speed Receiver (43 Hi-
Speed clocks Max) allows use of legacy
UTMI Links with a ULPI bridge
• External Reference Clock operation available
- ULPI Clock In Mode (60MHz sourced by
Link)
- 0 to 3.6V input drive tolerant
- Able to accept “noisy” clock sources as refer-
ence to internal, low-jitter PLL
- USB3330 and USB3333 support multiple fre-
quencies
• Smart detection circuits allow identification of
USB charger, headset, or data cable insertion
• Includes full support for the optional On-The-Go
(OTG) protocol detailed in the On-The-Go Sup-
plement Revision 2.0 specification
• Supports the OTG Host Negotiation Protocol
(HNP) and Session Request Protocol (SRP)
• UART mode for non-USB serial data transfers
• Internal 5V cable short-circuit protection of ID, DP
and DM lines to VBUS or ground
• Industrial Operating Temperature -40
°C to +85°C
• 25 ball, WLCSP RoHS Compliant package
(1.97 x 1.97 x 0.53 mm height)
Applications
The USB333x is the solution of choice for any applica-
tion where a Hi-Speed USB connection is desired and
when board space, power, and interface pins must be
minimized.
• Cell Phones
• PDAs
• MP3 Players
• GPS Personal Navigation
• Scanners
• External Hard Drives
• Digital Still and Video Cameras
• Portable Media Players
• Entertainment Devices
• Printers
• Set Top Boxes
• Video Record/Playback Systems
• IP and Video Phones
• Gaming Consoles
USB333x
Industry’s Smallest Hi-Speed USB Transceiver
with Single Supply Operation
USB333x
DS00001880A-page 2
2009 - 2015 Microchip Technology Inc.
TO OUR VALUED CUSTOMERS
It is our intention to provide our valued customers with the best documentation possible to ensure successful use of your Microchip
products. To this end, we will continue to improve our publications to better suit your needs. Our publications will be refined and
enhanced as new volumes and updates are introduced.
If you have any questions or comments regarding this publication, please contact the Marketing Communications Department via
E-mail at
docerrors@microchip.com
. We welcome your feedback.
Most Current Data Sheet
To obtain the most up-to-date version of this data sheet, please register at our Worldwide Web site at:
http://www.microchip.com
You can determine the version of a data sheet by examining its literature number found on the bottom outside corner of any page.
The last character of the literature number is the version number, (e.g., DS30000000A is version A of document DS30000000).
Errata
An errata sheet, describing minor operational differences from the data sheet and recommended workarounds, may exist for cur-
rent devices. As device/documentation issues become known to us, we will publish an errata sheet. The errata will specify the
revision of silicon and revision of document to which it applies.
To determine if an errata sheet exists for a particular device, please check with one of the following:
• Microchip’s Worldwide Web site;
http://www.microchip.com
• Your local Microchip sales office (see last page)
When contacting a sales office, please specify which device, revision of silicon and data sheet (include -literature number) you are
using.
Customer Notification System
Register on our web site at
www.microchip.com
to receive the most current information on all of our products.
2009 - 2015 Microchip Technology Inc.
DS00001880A-page 3
USB333x
Table of Contents
1.0 Introduction ..................................................................................................................................................................................... 4
2.0 USB333x Pin Locations and Definitions ........................................................................................................................................ 8
3.0 Limiting Values .............................................................................................................................................................................. 14
4.0 Electrical Characteristics ............................................................................................................................................................... 15
5.0 Architecture Overview ................................................................................................................................................................... 22
6.0 ULPI Operation ............................................................................................................................................................................. 40
7.0 ULPI Register Map ........................................................................................................................................................................ 58
8.0 Application Notes .......................................................................................................................................................................... 70
9.0 Package Outlines, Tape & Reel Drawings, Package Marking ...................................................................................................... 75
Appendix A: Data Sheet Revision History ........................................................................................................................................... 80
Product Identification System ............................................................................................................................................................. 82
The Microchip Web Site ...................................................................................................................................................................... 83
Customer Change Notification Service ............................................................................................................................................... 83
Customer Support ............................................................................................................................................................................... 83
USB333x
DS00001880A-page 4
2009 - 2015 Microchip Technology Inc.
1.0
INTRODUCTION
1.1
General Description
Microchip’s USB333x is a family of High Speed USB 2.0 Transceivers that provides a physical layer (PHY) solution well-
suited for portable electronic devices. Both commercial and industrial temperature applications are supported.
Each model in the USB333x family may use a 60MHz reference clock or the model-number specific reference clock as
shown on the
Product Identification System
page. The USB3330 and USB3333 can support several different frequen-
cies driven on the REFCLK pin. The configuration of the frequency selection pins set the desired reference frequency.
Several advanced features make the USB333x the transceiver of choice by reducing both eBOM part count and printed
circuit board (PCB) area. Outstanding ESD robustness eliminates the need for external ESD protection devices in typ-
ical applications. The internal Over-Voltage Protection circuit (OVP) protects the USB333x from voltages up to 30V on
the VBUS pin. By using a reference clock from the Link, the USB333x removes the cost of a dedicated crystal reference
from the design. The USB333x includes integrated 3.3V and 1.8V regulators, making it possible to operate the device
from a single power supply.
The USB333x is optimized for use in portable applications where a low operating current and standby current is essen-
tial. The USB333x also supports the Link Power Management protocol (LPM) to further reduce USB operating currents.
The USB333x also includes integrated battery charger detection circuitry. These circuits are used to detect the attach-
ment of a USB Charger as described in
Section 5.8
. By sensing the attachment to a USB Charger, a product using the
USB333x can draw more than 500mA from the USB connector.
The USB333x meets all of the electrical requirements for a High Speed USB Host, Device, or an On-the-Go (OTG) trans-
ceiver. In addition to the supporting USB signaling, the USB333x also provides USB UART mode and, in versions with
the integrated USB switch, USB Audio mode.
USB333x uses the industry standard UTMI+ Low Pin Interface (ULPI) to connect the USB PHY to the Link. ULPI uses
a method of in-band signaling and status byte transfers between the Link and PHY to facilitate a USB session with only
twelve pins.
The USB333x uses Microchip’s “wrapper-less” technology to implement the ULPI interface. This “wrapper-less” tech-
nology allows the PHY to achieve a low latency transmit and receive time. Microchip’s low latency transceiver allows an
existing UTMI Link to be reused by adding a UTMI to ULPI bridge. By adding a bridge to the ASIC the existing and
proven UTMI Link IP can be reused.
Versions of the USB333x with the integrated USB switch enable a single USB port of connection.
2009 - 2015 Microchip Technology Inc.
DS00001880A-page 5
USB333x
1.2
Block Diagrams
In USB Audio mode, a switch connects the DP pin to the SPK_R pin, and another switch connects he DM pin to the
SPK_L
pin. These switches are shown in the lower left-hand corner of
Figure 5-1
.The USB333x can be configured to
enter USB Audio mode as described in
Section 6.7.2
. In addition, these switches are on when the RESETB pin of the
USB333x is asserted. The USB Audio mode enables audio signaling from a single USB port of connection, and the
switches may also be used to connect Full Speed USB from another transceiver to the USB connector.
FIGURE 1-1:
BLOCK DIAGRAM (USB3331, USB3336, AND USB3338)
OTG
USB
DP/DM
Switch
Hi-Speed
USB
Transceiver
ULPI
Interface
ULPI
Registers
and State
Machine
BIAS
Low Jitter
Integrated
PLL
Integrated
Power
Management
VBUS
ID
DP
DM
RBIAS
ESD Pr
ot
ecti
on
SP
K_L
S
PK_
R
REFCLK
DATA[7:0]
RESETB
VDD18
VDD33
VBAT
DIR
NXT
STP
CLKOUT
OVP
USB333x
DS00001880A-page 6
2009 - 2015 Microchip Technology Inc.
FIGURE 1-2:
BLOCK DIAGRAM (USB3330)
FIGURE 1-3:
BLOCK DIAGRAM (USB3333)
OTG
Hi-Speed
USB
Transceiver
ULPI
Interface
ULPI
Registers
and State
Machine
BIAS
Low Jitter
Integrated
PLL
Integrated
Power
Management
VBUS
ID
DP
DM
RBIAS
ES
D
Pro
tect
ion
REF
C
L
K
DATA[7:0]
RESETB
VDD18
VDD33
VBAT
DIR
NXT
STP
CLKOUT
OVP
REF
[1
:0]
OTG
Hi-Speed
USB
Transceiver
ULPI
Interface
ULPI
Registers
and State
Machine
BIAS
Low Jitter
Integrated
PLL
Integrated
Power
Management
VBUS
ID
DP
DM
RBIAS
ESD Protection
REF
C
L
K
DATA[7:0]
RESETB
VDD18
VDD33
VBAT
DIR
NXT
STP
CLKOUT
OVP
REF
[0
]
VDDIO
2009 - 2015 Microchip Technology Inc.
DS00001880A-page 7
USB333x
The USB333x includes an integrated 3.3V LDO regulator that is used to generate 3.3V from power applied to the VBAT
pin. The voltage on the VBAT pin can range from 3.0 to 5.5V. The regulator dropout voltage is less than 100mV which
allows the PHY to continue USB signaling when the voltage on VBAT drops to 3.0V. The USB transceiver will continue
to operate at lower voltages, although some parameters may be outside the limits of the USB-IF specification for Full
Speed USB operation. The VBAT and VDD33 pins should never be connected together.
In USB UART mode, the USB333x DP and DM pins are redefined to enable pass-through of asynchronous serial data.
The USB333x will enter UART mode when programmed, as described in
Section 6.7.1
.
1.3
Reference Documents
UTMI+ Low Pin Interface (ULPI) Specification, Revision 1.1
Universal Serial Bus Specification, Revision 2.0
On-The-Go Supplement to the USB2.0 Specification, Revision 1.3
On-The-Go Supplement to the USB2.0 Specification, Revision 2.0
USB Battery Charging Specification, Revision 1.2
USB333x
DS00001880A-page 8
2009 - 2015 Microchip Technology Inc.
2.0
USB333X
PIN LOCATIONS AND DEFINITIONS
2.1
Package Diagram with Ball Locations
The illustration below is viewed from the top of the package.
FIGURE 2-1:
USB3331, USB3336, AND USB3338 BALL LOCATIONS - TOP VIEW
FIGURE 2-2:
USB3330 BALL LOCATIONS - TOP VIEW
A
E
D
C
B
1
5
4
3
2
TOP VIEW
RESETB
ID
VBUS
VBAT
VDD33
DM
DP
SPK_R
SPK_L
DATA[7]
DATA[4]
DATA[6]
DATA[5]
CLKOUT
DATA[3]
DATA[2]
DATA[1]
DATA[0]
NXT
DIR
STP
VDD18
REFCLK
RBIAS
GND
A
E
D
C
B
1
5
4
3
2
TOP VIEW
RESETB
ID
VBUS
VBAT
VDD33
DM
DP
REF[0]
REF[1]
DATA[7]
DATA[4]
DATA[6]
DATA[5]
CLKOUT
DATA[3]
DATA[2]
DATA[1]
DATA[0]
NXT
DIR
STP
VDD18
REFCLK
RBIAS
GND
2009 - 2015 Microchip Technology Inc.
DS00001880A-page 9
USB333x
2.2
Ball Definitions
The following table details the ball definitions for the figure above.
FIGURE 2-3:
USB3333 BALL LOCATIONS - TOP VIEW
TABLE 2-1:
USB3331, USB3336, AND USB3338 PIN DESCRIPTION
Ball
Name
Direction/
Type
Active
Level
Description
B1
ID
Input,
Analog
N/A
For device applications the ID pin is connected to
VDD33
. For Host applications ID is grounded. For
OTG applications the ID pin is connected to the USB
connector.
C2
VBUS
I/O,
Analog
N/A
This pin is used for the VBUS comparator inputs and
for VBUS pulsing during session request protocol. An
external resistor, R
VBUS
, is required between this pin
and the USB connector.
C1
VBAT
Power
N/A
Regulator input. The regulator supply can be from
5.5V to 3.0V.
D2
VDD33
Power
N/A
3.3V Regulator Output. A 1.0uF (<1 ohm ESR) bypass
capacitor to ground is required for regulator stability.
The bypass capacitor should be placed as close as
possible to the USB333x.
D1
DM
I/O,
Analog
N/A
D- pin of the USB cable.
E1
DP
I/O,
Analog
N/A
D+ pin of the USB cable.
E2
SPK_R
I/O,
Analog
N/A
USB switch in/out for DP signals.
E3
SPK_L
I/O,
Analog
N/A
USB switch in/out for DM signals.
A
E
D
C
B
1
5
4
3
2
TOP VIEW
VDD18
ID
RESETB
VBAT
VBUS
DM
DP
REF[0]
DATA[7]
VDD33
DATA[4]
DATA[6]
DATA[5]
CLKOUT
DATA[3]
DATA[2]
DATA[1]
DATA[0]
NXT
DIR
STP
VDDIO
REFCLK
RBIAS
GND
USB333x
DS00001880A-page 10
2009 - 2015 Microchip Technology Inc.
D3
DATA[7]
I/O,
CMOS
N/A
ULPI bi-directional data bus. DATA[7] is the MSB.
E4
DATA[6]
I/O,
CMOS
N/A
ULPI bi-directional data bus.
E5
DATA[5]
I/O,
CMOS
N/A
ULPI bi-directional data bus.
D4
DATA[4]
I/O,
CMOS
N/A
ULPI bi-directional data bus.
A5
CLKOUT
Output,
CMOS
N/A
ULPI Clock Out Mode:
60MHz ULPI clock output. All ULPI signals are driven
synchronous to the rising edge of this clock.
ULPI Clock In Mode:
Connect this pin to VDD18 to configure 60MHz ULPI
Clock IN mode as described in
Section 5.4.1
.
D5
DATA[3]
I/O,
CMOS
N/A
ULPI bi-directional data bus.
C4
DATA[2]
I/O,
CMOS
N/A
ULPI bi-directional data bus.
C5
DATA[1]
I/O,
CMOS
N/A
ULPI bi-directional data bus.
B4
DATA[0]
I/O,
CMOS
N/A
ULPI bi-directional data bus. DATA[0] is the LSB.
B5
NXT
Output,
CMOS
High
The PHY asserts NXT to throttle the data. When the
Link is sending data to the PHY, NXT indicates when
the current byte has been accepted by the PHY.
A4
DIR
Output,
CMOS
N/A
Controls the direction of the data bus. When the PHY
has data to transfer to the Link, it drives DIR high to
take ownership of the bus. When the PHY has no data
to transfer it drives DIR low and monitors the bus for
commands from the Link.
A3
STP
Input,
CMOS
High
The Link asserts STP for one clock cycle to stop the
data stream currently on the bus. If the Link is sending
data to the PHY, STP indicates the last byte of data
was on the bus in the previous cycle.
B3
VDD18
Power
N/A
1.8V Regulator Output. A 1.0uF (<1 ohm ESR) bypass
capacitor to ground is required for regulator stability.
The bypass capacitor should be placed as close as
possible to the USB333x.
B2
RESETB
Input,
CMOS,
Low
When low, the part is suspended and the 3.3V and
1.8V regulators are disabled. When high, the
USB333x will operate as a normal ULPI device, as
described in
Section 5.5.1
. The state of this pin may
be changed asynchronously to the clock signals.
When asserted for a minimum of 1 microsecond and
then de-asserted, the ULPI registers are reset to their
default state and all internal state machines are reset.
A2
REFCLK
Input,
CMOS
N/A
ULPI Clock Out Mode:
Model-specific reference clock.
See order numbers on
Product Identification System
page.
ULPI Clock In Mode:
60MHz ULPI clock input.
A1
RBIAS
Analog,
CMOS
N/A
Bias Resistor pin. This pin requires an 8.06kΩ (±1%)
resistor to ground, placed as close as possible to the
USB333x. Nominal voltage during ULPI operation is
0.8V.
C3
GND
Ground
N/A
Ground.
TABLE 2-1:
USB3331, USB3336, AND USB3338 PIN DESCRIPTION (CONTINUED)
Ball
Name
Direction/
Type
Active
Level
Description
2009 - 2015 Microchip Technology Inc.
DS00001880A-page 1
Highlights
• USB-IF Battery Charging 1.2 Specification Com-
pliant
• Link Power Management (LPM) Compliant
• Integrated ESD protection circuits
• Up to ±25kV IEC Air Discharge without external
devices
• Over-Voltage Protection circuit (OVP) protects the
VBUS pin from continuous DC voltages up to 30V
• Integrated USB Switch (USB3331, USB3336, and
USB3338)
- No degradation of Hi-Speed electrical char-
acteristics
- Allows single USB port of connection by pro-
viding switching function for:
- Battery charging
- Stereo and mono/mic audio
- USB Full-Speed/Low-Speed data
• RapidCharge Anywhere™ Provides:
- 3-times the charging current through a USB
port over traditional solutions
- USB-IF Battery Charging 1.2 compliance to
any portable device
- Charging current up to 1.5Amps via compati-
ble USB host or dedicated charger
- Dedicated Charging Port (DCP), Charging
(CDP) & Standard (SDP) Downstream Port
support
• flexPWR
®
Technology
- Extremely low current design ideal for battery
powered applications
- “Sleep” mode tri-states all ULPI pins and
places the part in a low current state
- 1.8V to 3.3V IO Voltage (USB3333)
• Single Power Supply Operation
- Integrated 1.8V regulator
- Integrated battery to 3.3V regulator
- 100mV dropout voltage
• PHYBoost
- Programmable USB transceiver drive
strength for recovering signal integrity
• VariSense
TM
- Programmable USB receiver sensitivity
• “Wrapper-less” design for optimal timing perfor-
mance and design ease
- Low Latency Hi-Speed Receiver (43 Hi-
Speed clocks Max) allows use of legacy
UTMI Links with a ULPI bridge
• External Reference Clock operation available
- ULPI Clock In Mode (60MHz sourced by
Link)
- 0 to 3.6V input drive tolerant
- Able to accept “noisy” clock sources as refer-
ence to internal, low-jitter PLL
- USB3330 and USB3333 support multiple fre-
quencies
• Smart detection circuits allow identification of
USB charger, headset, or data cable insertion
• Includes full support for the optional On-The-Go
(OTG) protocol detailed in the On-The-Go Sup-
plement Revision 2.0 specification
• Supports the OTG Host Negotiation Protocol
(HNP) and Session Request Protocol (SRP)
• UART mode for non-USB serial data transfers
• Internal 5V cable short-circuit protection of ID, DP
and DM lines to VBUS or ground
• Industrial Operating Temperature -40
°C to +85°C
• 25 ball, WLCSP RoHS Compliant package
(1.97 x 1.97 x 0.53 mm height)
Applications
The USB333x is the solution of choice for any applica-
tion where a Hi-Speed USB connection is desired and
when board space, power, and interface pins must be
minimized.
• Cell Phones
• PDAs
• MP3 Players
• GPS Personal Navigation
• Scanners
• External Hard Drives
• Digital Still and Video Cameras
• Portable Media Players
• Entertainment Devices
• Printers
• Set Top Boxes
• Video Record/Playback Systems
• IP and Video Phones
• Gaming Consoles
USB333x
Industry’s Smallest Hi-Speed USB Transceiver
with Single Supply Operation
USB333x
DS00001880A-page 2
2009 - 2015 Microchip Technology Inc.
TO OUR VALUED CUSTOMERS
It is our intention to provide our valued customers with the best documentation possible to ensure successful use of your Microchip
products. To this end, we will continue to improve our publications to better suit your needs. Our publications will be refined and
enhanced as new volumes and updates are introduced.
If you have any questions or comments regarding this publication, please contact the Marketing Communications Department via
E-mail at
docerrors@microchip.com
. We welcome your feedback.
Most Current Data Sheet
To obtain the most up-to-date version of this data sheet, please register at our Worldwide Web site at:
http://www.microchip.com
You can determine the version of a data sheet by examining its literature number found on the bottom outside corner of any page.
The last character of the literature number is the version number, (e.g., DS30000000A is version A of document DS30000000).
Errata
An errata sheet, describing minor operational differences from the data sheet and recommended workarounds, may exist for cur-
rent devices. As device/documentation issues become known to us, we will publish an errata sheet. The errata will specify the
revision of silicon and revision of document to which it applies.
To determine if an errata sheet exists for a particular device, please check with one of the following:
• Microchip’s Worldwide Web site;
http://www.microchip.com
• Your local Microchip sales office (see last page)
When contacting a sales office, please specify which device, revision of silicon and data sheet (include -literature number) you are
using.
Customer Notification System
Register on our web site at
www.microchip.com
to receive the most current information on all of our products.
2009 - 2015 Microchip Technology Inc.
DS00001880A-page 3
USB333x
Table of Contents
1.0 Introduction ..................................................................................................................................................................................... 4
2.0 USB333x Pin Locations and Definitions ........................................................................................................................................ 8
3.0 Limiting Values .............................................................................................................................................................................. 14
4.0 Electrical Characteristics ............................................................................................................................................................... 15
5.0 Architecture Overview ................................................................................................................................................................... 22
6.0 ULPI Operation ............................................................................................................................................................................. 40
7.0 ULPI Register Map ........................................................................................................................................................................ 58
8.0 Application Notes .......................................................................................................................................................................... 70
9.0 Package Outlines, Tape & Reel Drawings, Package Marking ...................................................................................................... 75
Appendix A: Data Sheet Revision History ........................................................................................................................................... 80
Product Identification System ............................................................................................................................................................. 82
The Microchip Web Site ...................................................................................................................................................................... 83
Customer Change Notification Service ............................................................................................................................................... 83
Customer Support ............................................................................................................................................................................... 83
USB333x
DS00001880A-page 4
2009 - 2015 Microchip Technology Inc.
1.0
INTRODUCTION
1.1
General Description
Microchip’s USB333x is a family of High Speed USB 2.0 Transceivers that provides a physical layer (PHY) solution well-
suited for portable electronic devices. Both commercial and industrial temperature applications are supported.
Each model in the USB333x family may use a 60MHz reference clock or the model-number specific reference clock as
shown on the
Product Identification System
page. The USB3330 and USB3333 can support several different frequen-
cies driven on the REFCLK pin. The configuration of the frequency selection pins set the desired reference frequency.
Several advanced features make the USB333x the transceiver of choice by reducing both eBOM part count and printed
circuit board (PCB) area. Outstanding ESD robustness eliminates the need for external ESD protection devices in typ-
ical applications. The internal Over-Voltage Protection circuit (OVP) protects the USB333x from voltages up to 30V on
the VBUS pin. By using a reference clock from the Link, the USB333x removes the cost of a dedicated crystal reference
from the design. The USB333x includes integrated 3.3V and 1.8V regulators, making it possible to operate the device
from a single power supply.
The USB333x is optimized for use in portable applications where a low operating current and standby current is essen-
tial. The USB333x also supports the Link Power Management protocol (LPM) to further reduce USB operating currents.
The USB333x also includes integrated battery charger detection circuitry. These circuits are used to detect the attach-
ment of a USB Charger as described in
Section 5.8
. By sensing the attachment to a USB Charger, a product using the
USB333x can draw more than 500mA from the USB connector.
The USB333x meets all of the electrical requirements for a High Speed USB Host, Device, or an On-the-Go (OTG) trans-
ceiver. In addition to the supporting USB signaling, the USB333x also provides USB UART mode and, in versions with
the integrated USB switch, USB Audio mode.
USB333x uses the industry standard UTMI+ Low Pin Interface (ULPI) to connect the USB PHY to the Link. ULPI uses
a method of in-band signaling and status byte transfers between the Link and PHY to facilitate a USB session with only
twelve pins.
The USB333x uses Microchip’s “wrapper-less” technology to implement the ULPI interface. This “wrapper-less” tech-
nology allows the PHY to achieve a low latency transmit and receive time. Microchip’s low latency transceiver allows an
existing UTMI Link to be reused by adding a UTMI to ULPI bridge. By adding a bridge to the ASIC the existing and
proven UTMI Link IP can be reused.
Versions of the USB333x with the integrated USB switch enable a single USB port of connection.
2009 - 2015 Microchip Technology Inc.
DS00001880A-page 5
USB333x
1.2
Block Diagrams
In USB Audio mode, a switch connects the DP pin to the SPK_R pin, and another switch connects he DM pin to the
SPK_L
pin. These switches are shown in the lower left-hand corner of
Figure 5-1
.The USB333x can be configured to
enter USB Audio mode as described in
Section 6.7.2
. In addition, these switches are on when the RESETB pin of the
USB333x is asserted. The USB Audio mode enables audio signaling from a single USB port of connection, and the
switches may also be used to connect Full Speed USB from another transceiver to the USB connector.
FIGURE 1-1:
BLOCK DIAGRAM (USB3331, USB3336, AND USB3338)
OTG
USB
DP/DM
Switch
Hi-Speed
USB
Transceiver
ULPI
Interface
ULPI
Registers
and State
Machine
BIAS
Low Jitter
Integrated
PLL
Integrated
Power
Management
VBUS
ID
DP
DM
RBIAS
ESD Pr
ot
ecti
on
SP
K_L
S
PK_
R
REFCLK
DATA[7:0]
RESETB
VDD18
VDD33
VBAT
DIR
NXT
STP
CLKOUT
OVP
USB333x
DS00001880A-page 6
2009 - 2015 Microchip Technology Inc.
FIGURE 1-2:
BLOCK DIAGRAM (USB3330)
FIGURE 1-3:
BLOCK DIAGRAM (USB3333)
OTG
Hi-Speed
USB
Transceiver
ULPI
Interface
ULPI
Registers
and State
Machine
BIAS
Low Jitter
Integrated
PLL
Integrated
Power
Management
VBUS
ID
DP
DM
RBIAS
ES
D
Pro
tect
ion
REF
C
L
K
DATA[7:0]
RESETB
VDD18
VDD33
VBAT
DIR
NXT
STP
CLKOUT
OVP
REF
[1
:0]
OTG
Hi-Speed
USB
Transceiver
ULPI
Interface
ULPI
Registers
and State
Machine
BIAS
Low Jitter
Integrated
PLL
Integrated
Power
Management
VBUS
ID
DP
DM
RBIAS
ESD Protection
REF
C
L
K
DATA[7:0]
RESETB
VDD18
VDD33
VBAT
DIR
NXT
STP
CLKOUT
OVP
REF
[0
]
VDDIO
2009 - 2015 Microchip Technology Inc.
DS00001880A-page 7
USB333x
The USB333x includes an integrated 3.3V LDO regulator that is used to generate 3.3V from power applied to the VBAT
pin. The voltage on the VBAT pin can range from 3.0 to 5.5V. The regulator dropout voltage is less than 100mV which
allows the PHY to continue USB signaling when the voltage on VBAT drops to 3.0V. The USB transceiver will continue
to operate at lower voltages, although some parameters may be outside the limits of the USB-IF specification for Full
Speed USB operation. The VBAT and VDD33 pins should never be connected together.
In USB UART mode, the USB333x DP and DM pins are redefined to enable pass-through of asynchronous serial data.
The USB333x will enter UART mode when programmed, as described in
Section 6.7.1
.
1.3
Reference Documents
UTMI+ Low Pin Interface (ULPI) Specification, Revision 1.1
Universal Serial Bus Specification, Revision 2.0
On-The-Go Supplement to the USB2.0 Specification, Revision 1.3
On-The-Go Supplement to the USB2.0 Specification, Revision 2.0
USB Battery Charging Specification, Revision 1.2
USB333x
DS00001880A-page 8
2009 - 2015 Microchip Technology Inc.
2.0
USB333X
PIN LOCATIONS AND DEFINITIONS
2.1
Package Diagram with Ball Locations
The illustration below is viewed from the top of the package.
FIGURE 2-1:
USB3331, USB3336, AND USB3338 BALL LOCATIONS - TOP VIEW
FIGURE 2-2:
USB3330 BALL LOCATIONS - TOP VIEW
A
E
D
C
B
1
5
4
3
2
TOP VIEW
RESETB
ID
VBUS
VBAT
VDD33
DM
DP
SPK_R
SPK_L
DATA[7]
DATA[4]
DATA[6]
DATA[5]
CLKOUT
DATA[3]
DATA[2]
DATA[1]
DATA[0]
NXT
DIR
STP
VDD18
REFCLK
RBIAS
GND
A
E
D
C
B
1
5
4
3
2
TOP VIEW
RESETB
ID
VBUS
VBAT
VDD33
DM
DP
REF[0]
REF[1]
DATA[7]
DATA[4]
DATA[6]
DATA[5]
CLKOUT
DATA[3]
DATA[2]
DATA[1]
DATA[0]
NXT
DIR
STP
VDD18
REFCLK
RBIAS
GND
2009 - 2015 Microchip Technology Inc.
DS00001880A-page 9
USB333x
2.2
Ball Definitions
The following table details the ball definitions for the figure above.
FIGURE 2-3:
USB3333 BALL LOCATIONS - TOP VIEW
TABLE 2-1:
USB3331, USB3336, AND USB3338 PIN DESCRIPTION
Ball
Name
Direction/
Type
Active
Level
Description
B1
ID
Input,
Analog
N/A
For device applications the ID pin is connected to
VDD33
. For Host applications ID is grounded. For
OTG applications the ID pin is connected to the USB
connector.
C2
VBUS
I/O,
Analog
N/A
This pin is used for the VBUS comparator inputs and
for VBUS pulsing during session request protocol. An
external resistor, R
VBUS
, is required between this pin
and the USB connector.
C1
VBAT
Power
N/A
Regulator input. The regulator supply can be from
5.5V to 3.0V.
D2
VDD33
Power
N/A
3.3V Regulator Output. A 1.0uF (<1 ohm ESR) bypass
capacitor to ground is required for regulator stability.
The bypass capacitor should be placed as close as
possible to the USB333x.
D1
DM
I/O,
Analog
N/A
D- pin of the USB cable.
E1
DP
I/O,
Analog
N/A
D+ pin of the USB cable.
E2
SPK_R
I/O,
Analog
N/A
USB switch in/out for DP signals.
E3
SPK_L
I/O,
Analog
N/A
USB switch in/out for DM signals.
A
E
D
C
B
1
5
4
3
2
TOP VIEW
VDD18
ID
RESETB
VBAT
VBUS
DM
DP
REF[0]
DATA[7]
VDD33
DATA[4]
DATA[6]
DATA[5]
CLKOUT
DATA[3]
DATA[2]
DATA[1]
DATA[0]
NXT
DIR
STP
VDDIO
REFCLK
RBIAS
GND
USB333x
DS00001880A-page 10
2009 - 2015 Microchip Technology Inc.
D3
DATA[7]
I/O,
CMOS
N/A
ULPI bi-directional data bus. DATA[7] is the MSB.
E4
DATA[6]
I/O,
CMOS
N/A
ULPI bi-directional data bus.
E5
DATA[5]
I/O,
CMOS
N/A
ULPI bi-directional data bus.
D4
DATA[4]
I/O,
CMOS
N/A
ULPI bi-directional data bus.
A5
CLKOUT
Output,
CMOS
N/A
ULPI Clock Out Mode:
60MHz ULPI clock output. All ULPI signals are driven
synchronous to the rising edge of this clock.
ULPI Clock In Mode:
Connect this pin to VDD18 to configure 60MHz ULPI
Clock IN mode as described in
Section 5.4.1
.
D5
DATA[3]
I/O,
CMOS
N/A
ULPI bi-directional data bus.
C4
DATA[2]
I/O,
CMOS
N/A
ULPI bi-directional data bus.
C5
DATA[1]
I/O,
CMOS
N/A
ULPI bi-directional data bus.
B4
DATA[0]
I/O,
CMOS
N/A
ULPI bi-directional data bus. DATA[0] is the LSB.
B5
NXT
Output,
CMOS
High
The PHY asserts NXT to throttle the data. When the
Link is sending data to the PHY, NXT indicates when
the current byte has been accepted by the PHY.
A4
DIR
Output,
CMOS
N/A
Controls the direction of the data bus. When the PHY
has data to transfer to the Link, it drives DIR high to
take ownership of the bus. When the PHY has no data
to transfer it drives DIR low and monitors the bus for
commands from the Link.
A3
STP
Input,
CMOS
High
The Link asserts STP for one clock cycle to stop the
data stream currently on the bus. If the Link is sending
data to the PHY, STP indicates the last byte of data
was on the bus in the previous cycle.
B3
VDD18
Power
N/A
1.8V Regulator Output. A 1.0uF (<1 ohm ESR) bypass
capacitor to ground is required for regulator stability.
The bypass capacitor should be placed as close as
possible to the USB333x.
B2
RESETB
Input,
CMOS,
Low
When low, the part is suspended and the 3.3V and
1.8V regulators are disabled. When high, the
USB333x will operate as a normal ULPI device, as
described in
Section 5.5.1
. The state of this pin may
be changed asynchronously to the clock signals.
When asserted for a minimum of 1 microsecond and
then de-asserted, the ULPI registers are reset to their
default state and all internal state machines are reset.
A2
REFCLK
Input,
CMOS
N/A
ULPI Clock Out Mode:
Model-specific reference clock.
See order numbers on
Product Identification System
page.
ULPI Clock In Mode:
60MHz ULPI clock input.
A1
RBIAS
Analog,
CMOS
N/A
Bias Resistor pin. This pin requires an 8.06kΩ (±1%)
resistor to ground, placed as close as possible to the
USB333x. Nominal voltage during ULPI operation is
0.8V.
C3
GND
Ground
N/A
Ground.
TABLE 2-1:
USB3331, USB3336, AND USB3338 PIN DESCRIPTION (CONTINUED)
Ball
Name
Direction/
Type
Active
Level
Description